About Roa Logic


Founded in 2014 by Richard Herveille, Roa Logic BV specialises in the development of Intellectual Property Cores for FPGA and ASIC, with a strong focus on the embedded market. We provide the IP required to build a complete embedded solution, including processors, peripherals, memory, and interfaces.

Roa Logic offers its IP for download from its GitHub page. All IP can be tested and used for non-commercial applications for free. For support, modifications, and commercial usage a fee charged. This business model allows our customers to test our IP and develop and test their application before making any financial commitments.


Roa Logic expertise covers System, Hardware and Software development of FPGA and ASIC applications including:

  • 15+ Years of experience in FPGA and ASIC development, including Architecture specifications, RTL design, Verification, Synthesis, prototyping, test, debug.
  • 10+ Years of experience in programmable logic architecture design, including architecture specifications, software requirements, process & design flow specifications and implementation.

Design Methodology

Roa Logic leverages technology independent HDL (Hardware Description Language) using a strict and robust top down design methodology. All IP is simulated at behavioral and gate levels and are provided with methodology scripts, exhaustive standard compliance verification suites and complete documentation.


Roa Logic's portfolio consists of RISC-V compliant embedded processors featuring AMBA Interfaces, associated peripherals & interfaces, Bridging & Switching and Error Correction cores