The APB4 GPIO Core is fully parameterised core designed to provide a user-defined number of general purpose, bidirectional IO to a design.

The IO are accessible via an AMBA APB v2.0 Specification interface – typically referred to as APB4 – and the core operates synchronously with the rising edge of the APB4 Bus Clock..

Inputs to the core may operate asynchronously to the core and will be automatically synchronised to the bus clock. Outputs may be configured to operate in push-pull mode or open-drain,


  • Compliant with AMBA APB v2.0 Specification
  • User-defined number of Bi-directional General Purpose IO
  • Automatic synchronisation of General Inputs to Bus Clock
  • Each General Output configurable as push-pull or open-drain

Documentation & Source Code

All source code and documentation is available for download from the Roa Logic GitHub Repository, subject to Licensing Conditions also documented in the repository:

Download from Github