The Roa Logic AHB-Lite Multi-layer Interconnect is a fully parameterized High Performance, Low Latency Interconnect Fabric soft IP for AHB-Lite. It allows a virtually unlimited number of AHB-Lite Bus Masters and Slaves to be connected without the need of bus arbitration to be implemented by the Bus Masters. Instead, Slave Side Arbitration is implemented for each Slave Port within the core.

The Multi-layer Interconnect supports Priority and Round-Robin based arbitration when multiple Bus Masters request access to the same Slave Port. Typically arbitration completes within 1 clock cycle


  • AMBA AHB-Lite Compatible
  • Fully parameterized
  • Unlimited number of Bus Masters and Slaves[1]
  • Slave side arbitration
  • Priority and Round-Robin based arbitration
  • Slave Port address decoding

[1] The number of Bus Masters and Slaves is physically limited by the timing requirements.

Documentation & Source Code

All source code and documentation is available for download from the Roa Logic GitHub Repository, subject to Licensing Conditions also documented in the repository:

Download from Github